2-families of lines in P 3 and pairs of congruent lines in P by Kruglyakov I.Z. PDF

By Kruglyakov I.Z.

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Extra resources for 2-families of lines in P 3 and pairs of congruent lines in P 3

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If so, right shift ; check for overflow DS00575B-page 45 AN575 RLF RRF RETLW SIGN,F AARGB0,F 0xFF ; return error code in WREG ;********************************************************************************************** ;********************************************************************************************** ; Floating Point Divide ; ; Input: 24 bit floating point dividend in AEXP, AARGB0, AARGB1 24 bit floating point divisor in BEXP, BARGB0, BARGB1 ; Use: CALL ; Output: 24 bit floating point quotient in AEXP, AARGB0, AARGB1 ; Result: AARG ; ; ; Max Timing: 32+13+15*26+25+12 = 472 clks 32+13+15*26+25+34 = 494 clks 32+13+15*26+25+38 = 498 clks ; Min Timing: 7+5 = 12 clks ; PM: 120 FPD24 <-- AARG / BARG RND = 0 RND = 1, SAT = 0 RND = 1, SAT = 1 DM: 11 ;---------------------------------------------------------------------------------------------FPD24 D24BNE0 TALIGN24 DS00575B-page 46 MOVF BTFSC GOTO BEXP,W _Z SETFDZ24 MOVF BTFSC GOTO AEXP,W _Z RES024 MOVF XORWF MOVWF BSF BSF AARGB0,W BARGB0,W SIGN AARGB0,MSB BARGB0,MSB CLRF MOVF MOVWF MOVF MOVWF TEMP AARGB0,W AARGB2 AARGB1,W AARGB3 MOVF SUBWF MOVF BTFSS INCFSZ SUBWF BARGB1,W AARGB3, f BARGB0,W _C BARGB0,W AARGB2, f CLRF CLRF AARGB2 AARGB3 BTFSS GOTO _C DALIGN24OK BCF RRF RRF RRF MOVLW _C AARGB0,F AARGB1,F AARGB2,F 0x01 ; test for divide by zero ; save sign in SIGN ; make argument MSB’s explicit ; clear align increment ; test for alignment ; align if necessary  1997 Microchip Technology Inc.

AN575 Please check the Microchip BBS for the latest version of the source code. For BBS access information, see Section 6, Microchip Bulletin Board Service information, page 6-3. 7 $ ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; PIC16 24-BIT FLOATING POINT LIBRARY Unary operations: both input and output are in AEXP,AARG Binary operations: input in AEXP,AARG and BEXP,BARG with output in AEXP,AARG All routines return WREG = 0x00 for successful completion, and WREG = 0xFF for an error condition specified in FPFLAGS.

AN575 ; PM: 2+112 = 114 DM: 11 ;---------------------------------------------------------------------------------------------FPS24 MOVLW XORWF 0x80 BARGB0,F ;********************************************************************************************** ; Floating Point Add ; ; Input: 24 bit floating point number in AEXP, AARGB0, AARGB1 24 bit floating point number in BEXP, BARGB0, BARGB1 ; Use: CALL FPA24 ; Output: 24 bit floating point sum in AEXP, AARGB0, AARGB1 ; Result: AARG ; ; ; Max Timing: 25+28+6*6+5+31+72 = 197 clks 25+28+6*6+5+42+72 = 208 clks 25+28+6*6+5+42+77 = 213 clks ; Min Timing: 8+4 = 12 clks ; PM: 112 <-- AARG - BARG RND = 0 RND = 1, SAT = 0 RND = 1, SAT = 1 DM: 11 ;---------------------------------------------------------------------------------------------FPA24 USEA24 MOVF XORWF MOVWF AARGB0,W BARGB0,W TEMP ; exclusive or of signs in TEMP CLRF CLRF AARGB2 BARGB2 ; clear extended byte MOVF SUBWF BTFSS GOTO AEXP,W BEXP,W _C USEA24 ; use AARG if AEXP >= BEXP MOVF MOVWF MOVF MOVWF MOVF MOVWF BEXP,W AARGB4 AEXP,W BEXP AARGB4,W AEXP ; use BARG if AEXP < BEXP ; therefore, swap AARG and BARG MOVF MOVWF MOVF MOVWF MOVF MOVWF BARGB0,W AARGB4 AARGB0,W BARGB0 AARGB4,W AARGB0 MOVF MOVWF MOVF MOVWF MOVF MOVWF BARGB1,W AARGB4 AARGB1,W BARGB1 AARGB4,W AARGB1 MOVF BTFSC RETLW BEXP,W _Z 0x00  1997 Microchip Technology Inc.

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2-families of lines in P 3 and pairs of congruent lines in P 3 by Kruglyakov I.Z.


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